Design and Simulation of 140 dB Dynamic Range and 20 uVrms Readout Noise CMOS Image Sensor

Makkey, Abeer Elsayed

doi:10.21608/mjeer.2021.193085

	Design and Simulation of 140 dB Dynamic Range and 20 uVrms Readout Noise CMOS Image Sensor
Menoufia Journal of Electronic Engineering Research
Article 7, Volume 30, Issue 2, July 2021, Pages 45-50 PDF (500.78 K)
Document Type: Original Article
DOI: 10.21608/mjeer.2021.193085
Author
Abeer Elsayed Makkey^*
Electrical Engineering Department Faculty of Engineering, Assiut University Assiut 71715, Egypt
Abstract
This paper provides the design, simulation and implementation of a very wide dynamic range and a low readout noise CMOS image sensor (CIS) with high sensitivity by using a diode connected transistors in parallel with floating diffusion node and sensor output. The sensor is simulated, designed and implemented in a 130 nm CMOS technology using cadence tool. The area of the proposed pixel reaches to 3 um x 3 um and consists of seven NMOS transistors and one capacitor. The readout circuit has the following parameters as very low output noise of 20 uVrms with a 5 MHz bandwidth for pixel circuitry. Power dissipation of 10 uW was achieved at an operation voltage of 1.6 V for pixel circuitry. The proposed sensor has good features of low noise and a 140 dB wide dynamic range due to the diode connected transistor configuration that has been used. This paper provides the effect of adding a diode connected transistors M7 and M8 on an increasing dynamic range of CMOS image sensor to 140 dB and reducing its readout noise to 20 uVrms. Also, this paper provides a mathematical simulation of noise model of CIS using Matlab and cadence.
Highlights
Based on the obtained results, the effect of adding diode connected transistors M7 and M8 improves a lot in the dynamic range and readout noise of CMOS image sensor. As shown in the traditional WDR CIS the use of overflow integration capacitance reduces the bandwidth of the sensor and so its speed is reduced. In the proposed WDR CIS by using diode connected transistors the readout noise reduced to 20 μVrms (0.6 e-rms) compared with in traditional CIS, which reached to 94.5 uVrms also, bandwidth in the proposed circuitry extendes to 5 MHz compared to the traditional one in which reached to 43 KHz. As this reduction in readout noise in the proposed CIS, the dynamic range is extended to 140 dB after adding a diode connected transistors M7 and M8 compared to traditional in which dynamic range reached to 83.7 dB.
Keywords
CMOS image sensor (CIS); wide dynamic range (WDR); bandwidth; readout noise; diode connected transistor

Full Text
The active pixel sensors (APS) are implemented in a commonly used CMOS technology, these sensors which fabricated using CMOS technology are very useful in many scientific, commercial and consumer applications [1]. Recently, CMOS image sensors allow integration of all functions required for timing, exposure process, color processing, compression of the image and analog to digital converters (ADCs) on the same die. In addition, CMOS image sensors provide additional advantages over CCD in terms of small consumption of power, small operating voltage, smaller noise and high sensitivity. Low noise CMOS Image Sensor (CIS) plays an important role in the image efficiency and clearance [2]. As, low noise sensor increases the sensor’s ability to see the image by only a few photons. This sensor has a wide application in different fields. Wide dynamic range CMOS image sensor, also considered very important parameter in determining the sensor performance. Wide dynamic range increases the sensor’s ability to capture the details of the image under low and high light conditions [3]. The image sensor is considered the main part of a digital camera, which converts optical information of the light photons into electrical signals. Nowadays, CMOS based imaging arrays have a great growing stage. Besides the low cost and low power consumption advantages, the continual development of CMOS image sensor publicity goes to other parameters such as the capability to integrate the sensors with electronics and the ability to achieve fast, customizable frame rates [4]. For all image sensors the low readout noise and high dynamic range are considered two important factors define the sensor quality. Nowadays, the development of CMOS image sensor technology is requiring a lot of efforts to be made to get CMOS image sensor with factors suitable with the existing requirements for imaging technology. Dynamic range of CIS is considered one of the most important parameters of the sensor which must be improved to increase the sensor quality in capturing the image details [5], [6], [7]. In this decade, increasing the dynamic range of CMOS image sensor became the main target even though there are initial methods were already proposed in most commercial sensors in which the dynamic range of the sensor is limited to about 72 dB [8]. There is a more common implementation using multiple exposures which achieved a high dynamic range reaches to 112 dB [9]. Reference [10] provides a new method to increase dynamic range by reducing the input referred noise as the temporal read-out noise. The CIS in [11] introduces a method that achieved a 40% reduction in the input–referred temporal noise. This paper focuses on increasing the dynamic range of voltage-mode CMOS image sensor and reducing its readout noise by providing a new technique that uses a diode connected transistors in pixel circuitry, and get CIS with high speed.
References
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