AbouGindia, I., Shehata, K., Elkfafi, M. (2006). FPGA HARDWARE IMPLIMENTATION FOR EXTERNAL MODEM INTERFACING. test, 5(5th International Conference on Electrical Engineering ICEENG 2006), 1-9. doi: 10.21608/iceeng.2006.33552
Islam Tawfik AbouGindia; Khaled Shehata; M. A. Elkfafi. "FPGA HARDWARE IMPLIMENTATION FOR EXTERNAL MODEM INTERFACING". test, 5, 5th International Conference on Electrical Engineering ICEENG 2006, 2006, 1-9. doi: 10.21608/iceeng.2006.33552
AbouGindia, I., Shehata, K., Elkfafi, M. (2006). 'FPGA HARDWARE IMPLIMENTATION FOR EXTERNAL MODEM INTERFACING', test, 5(5th International Conference on Electrical Engineering ICEENG 2006), pp. 1-9. doi: 10.21608/iceeng.2006.33552
AbouGindia, I., Shehata, K., Elkfafi, M. FPGA HARDWARE IMPLIMENTATION FOR EXTERNAL MODEM INTERFACING. test, 2006; 5(5th International Conference on Electrical Engineering ICEENG 2006): 1-9. doi: 10.21608/iceeng.2006.33552

FPGA HARDWARE IMPLIMENTATION FOR EXTERNAL MODEM INTERFACING

The International Conference on Electrical Engineering
Article 28, Volume 5, 5th International Conference on Electrical Engineering ICEENG 2006, May 2006, Pages 1-9    PDF (373.7 K)
Document Type: Original Article
DOI: 10.21608/iceeng.2006.33552
Authors
Islam Tawfik AbouGindia1; Khaled Shehata2; M. A. Elkfafi1
1Military Technical College, Cairo, Egypt.
2College of Engineering, Arab Academy for Science and Technology, Cairo, Egypt.
Abstract
Abstract:
Intelligent modems used in military messaging over IP networks require flow control
mechanism to prevent overflow of data into its buffers. We contribute for a complete flow
control mechanism with built in UART module. All modules are designed using VHDL
design entry. All modules are simulated, synthesized then integrated, and downloaded on an
FPGA. Timing Simulation results found to be matching with the hardware results obtained
from the logic analyzer.
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