Mid-infrared Transverse Electric (TE)-Pass Polarizer Based on Silicon-on-sapphire Platform | ||
| Delta University Scientific Journal | ||
| Article 17, Volume 7, Issue 1, April 2024 PDF (612.39 K) | ||
| Document Type: Original research papers | ||
| DOI: 10.21608/dusj.2024.268737.1054 | ||
| Authors | ||
| Ahmed El-Sayed Abd-Elkader* 1; Mohamed Farhat O. Hameed2; Salah S. A. Obayya3 | ||
| 1Electronics and Communications Engineering Department, Faculty of Engineering, Delta University for Science and Technology, Gamasa 11152, Egypt | ||
| 2Center for Nanotechnology, Zewail City of Science, Technology and Innovation, October Gardens, 6th of October City 12578, Giza, Egypt | ||
| 3Centre for Photonics and Smart Materials, Zewail City of Science, Technology and Innovation, October Gardens, 6th of October City 12578, Giza, Egypt | ||
| Abstract | ||
| In this paper, a compact mid-infrared (MIR) transverse-electric (TE)-pass polarizer is presented and numerically examined. The introduced polarizer is built on silicon-on-sapphire (SOS) platform. Such platform boasts key features such as minimal power consuming, superior linearity, and transmission with high speed, making it particularly advantageous for various applications, especially in the MIR spectrum. The proposed design is complementary metal-oxide-semiconductor (CMOS)-compatible based on bi-metallic materials, aluminium doped zinc oxide and titanium nitride, as alternative plasmonic materials. Large coupling between the surface plasmon and fundamental transverse magnetic (TM) modes is occurred in the silicon core by the bimetallic effect. Nevertheless, the transverse-electric mode can travel with negligible losses. The suggested TE-pass polarizer attains, at a 2 µm operating wavelength, an extinction ratio (ER) of 17.5 dB accompanied by an insertion loss (IL) of 0.1 dB at a device length of 3 µm. Moreover, the introduced polarizer design is simple and has high resilience to fabrication errors. | ||
| Keywords | ||
| polarization; surface plasmon; finite-element method; silicon-on-insulator | ||
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