Simulation of Single–Electron Transistor Circuits Using “VHDL-AMS” Model | ||
| Menoufia Journal of Electronic Engineering Research | ||
| Article 1, Volume 20, Issue 1, January 2010, Pages 1-10 | ||
| Document Type: Original Article | ||
| DOI: 10.21608/mjeer.2010.63814 | ||
| Authors | ||
| A. M. El-Shaer1; A. A. A. Nasser2; N. Hamdy2 | ||
| 1Alexandria Institute of Engineering and Technology, Alexandria, Egypt | ||
| 2Arad Academy for Science, Technology and Maritime Transport, Alexandria, Egypt. | ||
| Abstract | ||
| This paper presents a VHDL-AMS model for the simulation ofsingle-electron transistor (SETs) using VHDL-AMS (Very High speed Descriptive Language-Analogue and Mixed signal). The model is based on the SPICE macro-model. From the SPICE macro-model simple relations were derived which are suitable for VHDL-AMS. The proposed model can fully analyze the circuits containing analogue and digital applications with the advantage of concurrency of VHDL-AMS systems. The proposed model can describe the IDS-VDS characteristics ofSET and is applied to a Single-Electron NOR gate circuit. The resulting voltage transfer characteristics agreed with the results obtained from the SPICE macro-model. The model overcomes the difficulties associated with other techniques based on Monte-Carlo simulation | ||
| Keywords | ||
| VHDL-AMS; single-electron transistor; SPICE macro-model; island; IDS-VDS characteristics | ||
| References | ||
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